This invention relates to level shifters, and more particularly, to adjustable level shifters with low jitter.
Level shifting circuits are used to change the voltage range of digital signals. Digital data input signals are received at a level shifter input and corresponding level-shifted digital data output signals are provided at a level shifter output. A level shifter may, for example, convert 1.5 volt input signals to 3.3 volt output signals. Because the maximum voltage of the output data (3.3 volts) is different from the maximum voltage of the input data (1.5 volts), the signal level is said to be “shifted.”
Adjustable level shifter circuits are used in environments in which it is desired to provide user control over the output voltage level. In a typical adjustable level shifter arrangement, the level shifter is located on an integrated circuit and has a power supply terminal that is connected to one of the integrated circuit's input pins. During operation of the circuit, a user-defined voltage level is provided to the power supply terminal. This voltage level dictates the output voltage swing of the level shifter. Because the power supply voltage for an adjustable level shifter circuit can be adjusted, the circuitry in an adjustable level shifter must be designed to operate over a range of possible power supply voltages.
It is often necessary for level shifters to operate in high-speed environments in which switching performance is critical. In general, switching speeds should be as fast as possible. Jitter, which is a measure of the pulse-to-pulse timing variation of the output signal, should be as small as possible.
Conventional level shifter circuits often exhibit suboptimal jitter performance and slow switching speeds or are not adjustable.
It would therefore be desirable to be able to provide adjustable level shifter circuitry with improved performance.